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153 fS<sub>RMS</sub>-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHz Ring-<i>LC</i>-Hybrid Injection-Locked Clock Multiplier
Cited 3 time in
Web of Science
Cited 4 time in Scopus
- Authors
- Issue Date
- 2018
- Publisher
- IEEE
- Citation
- 2018 IEEE SYMPOSIUM ON VLSI CIRCUITS, pp.185-186
- Abstract
- This work presents an ultra-low-jitter hybrid injection-locked clock multiplier (ILCM) that cascades a ring ILCM and an LCIL CM to achieve a high multiplication factor of 114. A dual-purpose frequency calibrator (DPFC) that can calibrate the frequency drifts of the two VCOs, concurrently, consumes only 400 mu W. The RMS-jitter of the output signal at 22.8 GHz was 153 fs. Due to the DPFC, RMS-jitter was maintained to be less than 180 fs, across supply voltages and temperatures.
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Related Researcher
- College of Engineering
- Department of Electrical and Computer Engineering
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