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Low-Cost Packaging of 300 GHz Integrated Circuits With an On-Chip Patch Antenna

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dc.contributor.authorBakshi, Harshpreet S.-
dc.contributor.authorByreddy, Pranith R.-
dc.contributor.authorKenneth, K. O.-
dc.contributor.authorBlanchard, A.-
dc.contributor.authorLee, Mark-
dc.contributor.authorTuncer, Enis-
dc.contributor.authorChoi, Wooyeol-
dc.date.accessioned2024-04-30T01:21:31Z-
dc.date.available2024-04-30T01:21:31Z-
dc.date.created2024-04-26-
dc.date.created2024-04-26-
dc.date.issued2019-11-
dc.identifier.citationIEEE Antennas and Wireless Propagation Letters, Vol.18 No.11, pp.2444-2448-
dc.identifier.issn1536-1225-
dc.identifier.urihttps://hdl.handle.net/10371/199970-
dc.description.abstractPlacing a 300 GHz on-chip patch antenna in a low-cost quad-flat no-lead (QFN) package using materials based on silica microparticles dispersed in an epoxy matrix can improve the antenna performance. Full-wave simulations of a rectangular patch antenna, compliant with the metal stack and design rules of a 65 nm complementary metal-oxide-semiconductor (CMOS) process, show 13% radiation efficiency, 1 dB peak antenna gain, and 7 GHz -10 dB vertical bar S-11 vertical bar bandwidth increases when the thickness of packaging material over the antenna is similar to lambda/3. When placed in a QFN package, 276 GHz CMOS signal generators with the same on-chip antenna show the effective isotropic radiated power similar to 6 dB higher than that of unpackaged. This improvement is partly attributed to the antenna performance enhancement and demonstrates that it is possible to package 300 GHz integrated circuits with an on-chip patch antenna using a low-cost technique.-
dc.language영어-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.titleLow-Cost Packaging of 300 GHz Integrated Circuits With an On-Chip Patch Antenna-
dc.typeArticle-
dc.identifier.doi10.1109/LAWP.2019.2943371-
dc.citation.journaltitleIEEE Antennas and Wireless Propagation Letters-
dc.identifier.wosid000498569100021-
dc.identifier.scopusid2-s2.0-85075010625-
dc.citation.endpage2448-
dc.citation.number11-
dc.citation.startpage2444-
dc.citation.volume18-
dc.description.isOpenAccessN-
dc.contributor.affiliatedAuthorChoi, Wooyeol-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.subject.keywordPlusHIGH-EFFICIENCY-
dc.subject.keywordPlusCMOS-
dc.subject.keywordPlusARRAY-
dc.subject.keywordAuthorComplementary metal-oxide-semiconductor (CMOS)-
dc.subject.keywordAuthorlow-cost quad-flat no-lead (QFN)-
dc.subject.keywordAuthormillimeter-wave-
dc.subject.keywordAuthoron-chip antenna-
dc.subject.keywordAuthorpackaging-
dc.subject.keywordAuthorradiation efficiency-
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  • College of Engineering
  • Department of Electrical and Computer Engineering
Research Area High Frequency Microelectronics, Microwave engineering, Radio Frequency Integrated Circuit, 초고주파 공학, 초고주파 시스템, 초고주파 집적회로

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