Publications

Detailed Information

An Adaptive Routing Algorithm for 3D Mesh NoC with Limited Vertical Bandwidth

DC Field Value Language
dc.contributor.authorZhu, Mingyang-
dc.contributor.authorLee, Jinho-
dc.contributor.authorChoi, Kiyoung-
dc.date.accessioned2024-05-02T06:23:10Z-
dc.date.available2024-05-02T06:23:10Z-
dc.date.created2024-04-23-
dc.date.created2024-04-23-
dc.date.issued2012-
dc.identifier.citation2012 IEEE/IFIP 20TH INTERNATIONAL CONFERENCE ON VLSI AND SYSTEM-ON-CHIP (VLSI-SOC), pp.18-23-
dc.identifier.issn2324-8432-
dc.identifier.urihttps://hdl.handle.net/10371/200694-
dc.description.abstract3D die stacking integration technology offers a feasible and promising solution to overcome the barriers of interconnect efficiency and device scaling in modern systems. The emerging trend from 2D IC to 3D IC obtains better performance by getting more silicon area and shortening wire length. In 3D integration technologies, different layers of active devices are connected through vertical links. Currently, TSV is the most popular and practical way to implement vertical links. Yet, there exist difficulties at the technological level ensuring an acceptable yield number of vertical links. Therefore, the bandwidth of vertical links is often made smaller than horizontal links, which becomes a bottleneck of the whole system. This paper presents a traffic distributing adaptive routing algorithm for 3D systems with limited bandwidth in vertical links. Our simulation with synthetic traffic pattern reveals that in a 4x4x4 3D mesh network architecture, our proposed algorithm can achieve significant performance improvement in network latency and throughput compared to existing routing algorithms and is robust in that the performance is stable under different traffic patterns.-
dc.language영어-
dc.publisherIEEE-
dc.titleAn Adaptive Routing Algorithm for 3D Mesh NoC with Limited Vertical Bandwidth-
dc.typeArticle-
dc.citation.journaltitle2012 IEEE/IFIP 20TH INTERNATIONAL CONFERENCE ON VLSI AND SYSTEM-ON-CHIP (VLSI-SOC)-
dc.identifier.wosid000393378700004-
dc.identifier.scopusid2-s2.0-84872200062-
dc.citation.endpage23-
dc.citation.startpage18-
dc.description.isOpenAccessN-
dc.contributor.affiliatedAuthorLee, Jinho-
dc.contributor.affiliatedAuthorChoi, Kiyoung-
dc.type.docTypeProceedings Paper-
dc.description.journalClass1-
dc.subject.keywordAuthor3D NoC-
dc.subject.keywordAuthorvertical interconnect-
dc.subject.keywordAuthoradaptive routing-
Appears in Collections:
Files in This Item:
There are no files associated with this item.

Related Researcher

  • College of Engineering
  • Department of Electrical and Computer Engineering
Research Area AI Accelerators, Distributed Deep Learning, Neural Architecture Search

Altmetrics

Item View & Download Count

  • mendeley

Items in S-Space are protected by copyright, with all rights reserved, unless otherwise indicated.

Share