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A 36-Channel Auto-Calibrated Front-End ASIC for a pMUT-Based Miniaturized 3-D Ultrasound System

Cited 21 time in Web of Science Cited 28 time in Scopus
Authors

Lee, Jihee; Lee, Kyoung-Rog; Eovino, Benjamin E.; Park, Jeong Hoan; Liang, Luna Yue; Lin, Liwei; Yoo, Hoi-Jun; Yoo, Jerald

Issue Date
2021-06
Publisher
Institute of Electrical and Electronics Engineers
Citation
IEEE Journal of Solid-State Circuits, Vol.56 No.6, pp.1910-1923
Abstract
We present an area- and power-efficient application-specific integrated circuit (ASIC) for a miniaturized 3-D ultrasound system. The ASIC is designed to transmit pulse and receive echo through a 36-channel 2-D piezoelectric Micromachined Ultrasound Transducer (pMUT) array. The 36-channel ASIC integrates a transmitter (TX), a receiver (RX), and an analog-to-digital converter (ADC) within the 250-mu m pitch channel while consuming low-power and supporting calibration to compensate for the process variation of the pMUT. The charge-recycling high-voltage TX (CRHV-TX) in standard CMOS generates up to 13.2-VPP pulse while reducing 42.2% peak TX power consumption. Also, each CRHV-TX automatically calibrates excitation voltage according to acoustic pressure of pMUT. The dynamic-bit-shared ADC (DBS-ADC) shares the most significant bits (MSBs) among four channels based on the signal similarity between adjacent channels. The analog front end (AFE) with a received signal sensitivity indicator (RSSI) changes its gain adaptively in real time depending on input signal strength. The ASIC consumes 1.14-mW/channel average power with 1-kHz pulse repetition frequency (PRF) and three TX pulses per cycle. The ASIC in 0.18-mu m 1P6M Standard CMOS has been verified with both electrical and acoustic experiments with a 6x6 pMUT array.
ISSN
0018-9200
URI
https://hdl.handle.net/10371/200792
DOI
https://doi.org/10.1109/JSSC.2021.3049560
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부교수
  • College of Engineering
  • Department of Electrical and Computer Engineering
Research Area Biomedical Applications, Energy-Efficient Integrated Circuits

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