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Simulink(R)-based heterogeneous multiprocessor SoC design flow for mixed Hardware/Software refinement and Simulation
Cited 14 time in
Web of Science
Cited 20 time in Scopus
- Authors
- Issue Date
- 2009
- Publisher
- Elsevier
- Citation
- Integration, the VLSI Journal 42 pp.227-245
- Keywords
- Application to architecture mapping ; Codesign ; Design space exploration ; Memory optimization ; Multiprocessor system-on-chip ; Simulation ; Simulink ; System specification
- Abstract
- As a solution for dealing with the design complexity of multiprocessor SoC architectures, we present a joint Simulink-SystemC design flow that enables mixed hardware/software refinement and simulation in the early design process. First, we introduce the Simulink combined algorithm/architecture model (CAAM) unifying the algorithm and the abstract target architecture. From the Simulink CAAM, a hardware architecture generator produces architecture models at three different abstract levels, enabling a trade-off between simulation time and accuracy. A multithread code generator produces memory-efficient multithreaded programs to be executed on the architecture models. To show the applicability of the proposed design flow, we present experimental results on two real video applications.
- ISSN
- 0167-9260
- Language
- English
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