S-Space

Browse

Subject

Showing results 1 to 4 of 4

Issue Date	Title / Author(s) / Citation	File
2012-05	A Spur Suppression Technique Using an Edge-Interpolator for a Charge-Pump PLL Choi, Jaehyouk; Kim, Woonyun; Lim, Kyutae IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, Vol.20 No.5, pp.969-973	DOI
2018-04	A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique Lee, Yongsun; Seong, Taeho; Yoo, Seyeon; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.53 No.4, pp.1192-1202	DOI
2019-09	A 320-fs RMS Jitter and-75-dBc Reference-Spur Ring-DCO-Based Digital PLL Using an Optimal-Threshold TDC Seong, Taeho; Lee, Yongsun; Yoo, Seyeon; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.54 No.9, pp.2501-2512	DOI
2021-01	A Low-Jitter and Low-Reference-Spur Ring-VCO- Based Injection-Locked Clock Multiplier Using a Triple-Point Background Calibrator Yoo, Seyeon; Choi, Seojin; Lee, Yongsun; Seong, Taeho; Lim, Younghyun; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.56 No.1, pp.298-309	DOI