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(An)Alternating edge-sampling clock and data recovery circuit for loop characteristic stabilization : 루프특성 안정화를 위한 교차 천이검출 클럭데이터 복원회로

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dc.contributor.advisor정덕균-
dc.contributor.author이봉준-
dc.date.accessioned2010-01-27T23:13:22Z-
dc.date.available2010-01-27T23:13:22Z-
dc.date.copyright2004.-
dc.date.issued2004-
dc.identifier.urihttp://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000054458eng
dc.identifier.urihttps://hdl.handle.net/10371/45831-
dc.descriptionThesis (doctoral)--서울대학교 대학원 :전기·컴퓨터공학부,2004.en
dc.format.extentx, 109 leavesen
dc.language.isoenen
dc.publisher서울대학교 대학원en
dc.subjectCMOS 직렬 송수신기en
dc.subjectCmos serial link transceiveren
dc.subject지터 검출 회로en
dc.subjectJitter-estimation circuitryen
dc.subject위상 검출기en
dc.subjectPhase detector (pd)en
dc.subject교차 천이 검출en
dc.subjectAlternating-edge sampling (aes) methoden
dc.subject클록-데이터 복원 회로en
dc.subjectClock/data recovery (cdr)en
dc.subjectPhase-locked loop (pll)en
dc.subjectSampleren
dc.subjectVoltage-controlled oscillator (vco)en
dc.subjectPre-emphasisen
dc.subjectInductive peakingen
dc.title(An)Alternating edge-sampling clock and data recovery circuit for loop characteristic stabilizationen
dc.title.alternative루프특성 안정화를 위한 교차 천이검출 클럭데이터 복원회로en
dc.typeThesis-
dc.contributor.department전기·컴퓨터공학부-
dc.description.degreeDoctoren
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