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SOI MEMS 공정의 면적 최소화를 위한 웨이퍼수준 밀봉 실장 기술 : Wafer-level hermetic packaging technology for area minimization in SOI MEMS process
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 조동일 | - |
| dc.contributor.author | 이상철 | - |
| dc.date.accessioned | 2010-02-02T16:09:29Z | - |
| dc.date.available | 2010-02-02T16:09:29Z | - |
| dc.date.copyright | 2007. | - |
| dc.date.issued | 2007 | - |
| dc.identifier.uri | http://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000045162 | kog |
| dc.identifier.uri | https://hdl.handle.net/10371/48938 | - |
| dc.description | 學位論文(博士)--서울大學校 大學院 :電氣·컴퓨터工學部,2007. | ko |
| dc.format.extent | vii, 94장 | ko |
| dc.language.iso | ko | ko |
| dc.publisher | 서울大學校 大學院 | ko |
| dc.subject | 미세전기기계시스템 | ko |
| dc.subject | MEMS | ko |
| dc.subject | 멤즈 | ko |
| dc.subject | wafer-level hermetic packaging | ko |
| dc.subject | 통전로 | ko |
| dc.subject | electrical feed through | ko |
| dc.subject | 웨이퍼수준 | ko |
| dc.subject | 밀봉 | ko |
| dc.subject | 실장 | ko |
| dc.title | SOI MEMS 공정의 면적 최소화를 위한 웨이퍼수준 밀봉 실장 기술 | ko |
| dc.title.alternative | Wafer-level hermetic packaging technology for area minimization in SOI MEMS process | ko |
| dc.type | Thesis | - |
| dc.contributor.department | 電氣·컴퓨터工學部 | - |
| dc.description.degree | Doctor | ko |
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