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A two-week program for platform-based SoC design
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Park, Sanggyu | - |
| dc.contributor.author | Chae, Soo-Ik | - |
| dc.date.accessioned | 2010-04-01T01:05:00Z | - |
| dc.date.available | 2010-04-01T01:05:00Z | - |
| dc.date.issued | 2005-06 | - |
| dc.identifier.citation | International Conference on Microelectronic Systems Education, pp.43-44 | en |
| dc.identifier.uri | https://hdl.handle.net/10371/62267 | - |
| dc.description.abstract | This paper describes a two-week program for a
platform-based SoC design using SoCBase 1.0, a platform developed in the Center for SoC Design Technology. This program consists of 4 lectures and 9 labs. It covers several design steps from the transaction level to the FPGA prototype level for a Motion JPEG decoder. In this program we employed an SoC design flow based on SoCBase 1.0. It is targeted for graduate students and ASIC designers out in the industry. More than 100 engineers and graduate students have completed this program in 2004. | en |
| dc.language.iso | en | en |
| dc.publisher | IEEE | en |
| dc.title | A two-week program for platform-based SoC design | en |
| dc.type | Conference Paper | en |
| dc.contributor.AlternativeAuthor | 박상규 | - |
| dc.contributor.AlternativeAuthor | 채수익 | - |
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