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RTL Generation of Channel Architecture Templates for a Template-based SoC Design Flow
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Cho, Jinhyun | - |
dc.contributor.author | Choi, Soonwoo | - |
dc.contributor.author | Chae, Soo-Ik | - |
dc.date.accessioned | 2010-04-01T01:46:34Z | - |
dc.date.available | 2010-04-01T01:46:34Z | - |
dc.date.issued | 2008-09 | - |
dc.identifier.citation | Forum on specification and Design Languages 2008, pp.251-252 | en |
dc.identifier.isbn | 9781424422654 | - |
dc.identifier.uri | https://hdl.handle.net/10371/62289 | - |
dc.description.abstract | In this paper, we propose the design methodology
for communication channel templates from formal specification to RTL description. In this flow, design and verification start from one source, LTL property. We constructed LTL-to-TRS, which is translator from LTL property sets to Bluespec term-rewriting system (TRS) description. And, we use a Bluespec compiler as a synthesizer from TRS to RTL. Also, to match the implementation with the formal specification, we use a VIS solver as a model checker. And then, channel instances generated by proposed design method are transformed into channel template-generators for communication channel library. These channel templates can be used in DSE process in SoC design flow. | en |
dc.description.sponsorship | This work was supported by ISRC of SNU, BK21,
SystemIC 2010, IP/SoC of Seoul, and IDEC, Korea. | en |
dc.language.iso | en | en |
dc.publisher | IEEE | en |
dc.title | RTL Generation of Channel Architecture Templates for a Template-based SoC Design Flow | en |
dc.type | Conference Paper | en |
dc.contributor.AlternativeAuthor | 조진현 | - |
dc.contributor.AlternativeAuthor | 최순우 | - |
dc.contributor.AlternativeAuthor | 채수익 | - |
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