SHERP

Generating Compact Code from Dataflow Specifications of Multirate Signal Processing Algorithms

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Authors
Bhattacharyya, Shuvra S.; Buck, Joseph T.; Ha, Soonhoi; Lee, Edward A.
Issue Date
1995-03
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
IEEE Trans. Circ. Syst., vol. 42, pp. 138-150, Mar. 1995
Keywords
Signal processingDigital processingData flowSynchronousAssemblerCode generation
Abstract
Synchronous dataflow (SDF) semantics are wellsuited to representing and compiling multirate signal processing algorithms. A key to this match is the ability to cleanly express iteration without overspecifying the execution order of computations, thereby allowing efficient schedules to be constructed. Due to limited program memory, it is often desirable to translate the iteration in an SDF graph into groups of repetitive Wring patterns so that loops can be constructed in the target code. This paper establishes fundamental topological relationships between iteration and looping in SDF graphs, and presents a scheduling framework that provably synthesizes the most compact looping structures for a large class of practical SDF graphs. By modularizing different components of the scheduling framework, and establishing their independence, we show how other scheduling objectives, such as minimizing data buffering requirements or increasing the number of data transfers that occur in registers, can be incorporated in a manner that does not conflict with the goal of code compactness.
ISSN
1057-7122
Language
English
URI
http://hdl.handle.net/10371/7553
DOI
https://doi.org/10.1109/81.376876
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College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Computer Science and Engineering (컴퓨터공학부)Journal Papers (저널논문_컴퓨터공학부)
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