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신경 보철 장치를 위한 체내 이식용 회로 설계 : Design of implantable circuit for neural prosthetic devices

DC Field Value Language
dc.contributor.author이중재-
dc.contributor.author안순관-
dc.contributor.author송종근-
dc.contributor.author김성준-
dc.date.accessioned2009-08-27T03:02:04Z-
dc.date.available2009-08-27T03:02:04Z-
dc.date.issued2007-02-08-
dc.identifier.citation제14회 한국반도체학술대회, 제주, 2007년 2월 8-9일en
dc.identifier.urihttps://hdl.handle.net/10371/7915-
dc.description.abstractThis paper describes a design and implementation of
an implantable circuit for neural prosthetic devices. It
is recommended that the circuit should provide
charge-balanced biphasic current pulses and the
function of monitoring impedance of the electrode for
safe and effective current stimulation. In our design,
the current pulses are provided from binary weighted 8
current sources through switch network. And to
implement the recording function we designed the
voltage-to-time converter which converts the voltage
measured between two electrodes into pulse duration
of the output signal. The signal is sent to out-of-body
by load modulation through bidirectional coil
communication. And we proposed the pulse counting
circuit in order to improve the robustness of being
immune to the skin depth between two coils. The
designed circuit was fabricated in 0.8 ㎛ High Voltage
CMOS process. The pulse counting circuit successfully
decodes the received signal from the implanted coil in
the skin depth of up to 13mm at the data transmission
rate of 125kbps with bit error rate of better than
1X10-6. The current can range from 0 to 1.86mA in
7.3uA steps. The chip was capable of providing 8000
pulses/s and sampling electrode voltage from 0.5V to
4.5V.
en
dc.description.sponsorship본 연구는 과학기술부/한국과학재단 우수연구센터육성사
업의 지원으로 수행되었음( R11-2000-075-01001-0)
en
dc.language.isokoen
dc.title신경 보철 장치를 위한 체내 이식용 회로 설계en
dc.title.alternativeDesign of implantable circuit for neural prosthetic devicesen
dc.typeConference Paperen
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