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Issue Date	Title / Author(s) / Citation	File	Altmetrics
2019-08	Design Rule Evaluation Framework Using Automatic Cell Layout Generator for Design Technology Co-Optimization Jo, Kyeongrok; Ahn, Seyong; Do, Jungho; Song, Taejoong; Kim, Taewhan; Choi, Kyumyung IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol.27 No.8, pp.1933-1946	DOI
2021	Optimal Transistor Placement Combined with Global In-cell Routing in Standard Cell Layout Synthesis Jo, Kyeongrok; Kim, Taewhan 2021 IEEE 39TH INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD 2021), pp.517-524	DOI