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Si1-xGex crystallization for vertical channel in VNAND : 수직 구조 낸드 플래시 메모리 내 수직 채널 적용 목적으로의 Si1-xGex 결정화 연구

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dc.contributor.advisor윤의준-
dc.contributor.author이상수-
dc.date.accessioned2017-07-13T05:45:52Z-
dc.date.available2017-07-13T05:45:52Z-
dc.date.issued2015-02-
dc.identifier.other000000026747-
dc.identifier.urihttps://hdl.handle.net/10371/118004-
dc.description학위논문 (박사)-- 서울대학교 대학원 : 재료공학부, 2015. 2. 윤의준.-
dc.description.abstractRecently, the three-dimensional vertical NAND (VNAND) flash memory structure is developed to overcome the scaling limit and degree of integration issues of conventional two-dimensional planar NAND flash memory. The solid phase crystallization is used as a crystallization technique for vertical channel in VNAND. However, the solid phase crystallized film has fatal limitations related to the electrical properties when used as a channel material due to the high density of grain boundaries and intra-grain defects in the microstructure. Especially, it is expected that the string current degradation as the number of cell layers is increased for higher bit densities in the next-generation VNAND. Therefore, having a high quality poly-crystalline channel that is large-grained and less-defective microstructure is very important for next-generation VNAND as well as devices currently in use.
In this study, the Si1-xGex/Si bi-layer structure is proposed in order to obtain the high quality poly-crystalline Si channel microstructure. This bi-layer structure is simple, easy and directly applicable to the VNAND process. The bi-layer shows Si1-xGex surface nucleation and induces equiaxial grains that leads to large-grained and less-defective microstructure in the Si channel layer. Furthermore, the Si1-xGex lateral growth method is proposed based on the crystallization behavior of Si1-xGex bi-layer in order to obtain even large grains in the Si channel layer. The Ge/Si bi-layer is introduced to maximize the lateral growth effect. It was confirmed that the Ge layers are crystallized through the lateral growth only without any nucleation. After Si growth, the laterally grown grains are shown through the Ge and Si layers. These results mean that the very large Si grains over film thickness can be obtained after the Ge nucleation layer stripping. Accordingly, using a bi-layer as a channel structure is expected to improve the electrical properties of each cells and to minimize the degradation of string current in VNAND.
Additionally, the poly-crystalline Ge single layer is proposed as a vertical channel structure in VNAND. The secondary grain growth which shows the very larger grains over film thicknesses is applied as a crystallization technique. The grains three or four time larger than adjacent grains and over film thickness are detected after annealing near VNAND thermal budget. Besides, the two-step annealing was proposed combining different grain growth kinetics in order to enlarge the grain size in a given thermal budget. The two-step annealed films showed greatly increased hole mobility compare to conventional single-step annealing and expected microstructural evolution was also discussed.
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dc.description.tableofcontents1 Introduction 1
1.1 Scaling of NAND flash memory 1
1.2 Emergence of vertical NAND flash memory 2
1.3 Vertical channel formation in VNAND. 8
1.4 Technical Issues for vertical channel in VNAND. 14
1.5 Thesis Contents and Organization. 19
2 Crystallization Techniques for Vertical Channel in VNAND 21
2.1 Solid Phase Crystallization 21
2.1.1 Crystallization of amorphous Si 21
2.1.2 Thermodynamics of Si SPC 25
2.1.3 Microstructure of solid phase crystallized Si film 28
2.1.4 Si SPC techniques for VNAND process. 33
2.1.5 Si1-xGex/Si bi-layer structure for vertical channel in VNAND 39
2.2 Grain Growth 41
2.2.1 Poly-crystalline semiconductor film. 41
2.2.2 Normal grain growth. 44
2.2.3 Secondary grain growth. 45
2.2.4 Ge SEDSGG for vertical channel in VNAND 48
3 Solid Phase Crystallization of Si1-xGex/Si Bi-Layer 50
3.1 Crystallization Behavior of Si1-Gex/Si Bi-Layer. 50
3.1.1 Introduction. 50
3.1.2 Experimental details 51
3.1.3 Results and discussions. 52
3.1.4 Summary. 64
3.2 Lateral Growth for Large-Grained Si Channel Layer. 65
3.2.1 Introduction. 65
3.2.2 Experimental details 68
3.2.3 Results and discussions. 69
3.2.4 Summary. 82
3.3 Technical Issues and Future Work. 83
3.3.1 Si, Ge intermixing. 83
3.3.2 Surface roughness of Si channel layer after Si1-xGex layer stripping 83
3.3.3 Surface nucleation in a Si1-xGex/Si bi-layer. 84
4 Grain Growth of Poly-Crystalline Ge. 87
4.1 Introduction. 87
4.2 Experimental Details. 88
4.3 Results and Discussions 92
4.3.1 High temperature annealing of poly-crystalline Ge 92
4.3.2 Annealing near VNAND thermal budget 98
4.3.3 Two-step annealing 104
4.3.4 Carrier mobility of poly-crystalline Ge films 113
4.4 Summary 115
5 Conclusions 116
Bibliography. 119
국 문 초 록. 131
연 구 실 적. 134
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dc.formatapplication/pdf-
dc.format.extent7153803 bytes-
dc.format.mediumapplication/pdf-
dc.language.isoen-
dc.publisher서울대학교 대학원-
dc.subjectVertical NAND flash memory (VNAND)-
dc.subjectSolid phase crystallization (SPC)-
dc.subjectGrain growth-
dc.subjectSi1-xGex-
dc.subjectIn situ transmission electron microscopy (TEM)-
dc.subjectTransmission electron microscopy (TEM)-
dc.subject.ddc620-
dc.titleSi1-xGex crystallization for vertical channel in VNAND-
dc.title.alternative수직 구조 낸드 플래시 메모리 내 수직 채널 적용 목적으로의 Si1-xGex 결정화 연구-
dc.typeThesis-
dc.contributor.AlternativeAuthorSangsoo Lee-
dc.description.degreeDoctor-
dc.citation.pagesxiii, 141-
dc.contributor.affiliation공과대학 재료공학부-
dc.date.awarded2015-02-
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