A Simulation Study of Self-organization in Neural Network by Spike-timing Dependent Plasticity

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공과대학 재료공학부
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서울대학교 대학원
neuromorphicneural networkartificial neuronartificial synapsesynaptic plasticityspike-timing dependent plasticitySTDPmemristorneuromemristive system
학위논문 (박사)-- 서울대학교 대학원 : 재료공학부, 2015. 8. 황철성.
Contemporary computers can operate very fast, so they can calculate
more than about 109 times in a second. This computability is used in several
fields like mathematics, science, engineering and so on mightily importantly.
But, information that computers should process becomes complicated and
heavy. Analyzing images, nature language process, and controlling 2 pair of
walking robots are the examples. Contemporary computers cannot handle
these problems. To solve this, a neuromorphic whose aim is generating
machine whose operating principles are similar with an organics brain has
been studied. Its goal is to generate a hardware which processes huge
information by copying neuron and synapse that constituting the organics
brain. Among them. The synapse has an important property called synaptic
plasticity. It is known as one of important mechanisms forming memory and
learning phenomenon. And nowadays, researches whose aim is to copy the
synaptic plasticity using memristor have increased. Memristor is a material
whose resistance is changeable depending on quantities of passing electric
charge. It is paid attention as non-volatile memory device using this property.
This paper is made up properties of spike-timing dependent
plasticity(STDP) that is one of the synaptic plasticities and conditions of the
memristor device for copying this phenomenon. A process of change of a
neural network applied STDP using computer simulation is studied in this paper. Also, the memristor that is already reported is divided into 5 types
depending on traits of resistance variation and differences generated when
each memristor is applied are observed.
At first, latency decrease effectiveness by STDP was studied. It was
known that the STDP decreased latency through learning and made
predicting an order of continuing input possible by existing researches. A
computer simulation program was generated to study latency decrease
phenomenon by STDP in a point of a nerve network. A neuron was
simulated using Leaky Integrated-and-Fire(LIF) model, and the STDP is
simulated using Triplet of spike model. Phenomenon of cooperation and
competition by STDP were observed by a small-scaled nerve network using
three neurons. It tended to happen the cooperation phenomenon when the
less a time difference between signals was, and happen the competition
phenomenon when the bigger a time difference between signals was, when
more than two signals of neuron were input as a neuron. Paths were inclined
to be converged to the shortest path by STDPs competition phenomenon in
general-scaled nerve networks. This result of the convergence was similar
with a result of Dijkstras algorithm that investigated the shortest paths.
After learning by STDP, a time spending for propagation in a nerve network
grew shorter than before learning according to potentiation of synapse
corresponding to the shortest path.
Next, research about circuits and materials for copying synapse using
memristor is progressed. At first, issues in the integration, and material
properties of the three-dimensional cross bar array synapses are dealt with in
a quantitative manner. Two important quantitative guidelines for the
memristive synapses integration are provided with respect to the required
numbers of signal wires and sneak current paths. The merit of 3D cross bar
arrays over 2D cross bar arrays (i.e., the decrease in effect memory cell size)
can be realized only under certain limited conditions due to the increased
area and layout complexity of the periphery circuits. The problem is
quantitatively dealt with using the generalized equation for the overall
resistance of the parasitic current paths. Next, The exist memristor was
divided into 5 types : binary, linear, log, hard reset, hard set type. Then,
STDP modified for each property of resistance variation was applied to them.
A resistance value was controlled to show as a form of normal distribution
using a normal distribution random number generator to replicate resistance
variation phenomenon of actual device. Each result was compared with a
result using ideal STDP model. As a result, in the case of the binary type, a
degree of consistency decreased in proportion to variation value, and the
variation value had less of an effect on the linear type. It declined greatly
when the variation value was over 0.3 in the case of the log type. When it
comes to the hard reset type, a degree of consistency was the highest among
5 types of memristor, and it was less influenced by variation. On the contrary,
in the case of the hard set type, a degree of consistency was the lowest. Finally, atomic layer deposition was discussed in detail as the most feasible
fabrication process of 3D CBA because it can provides the device with the
necessary conformality and atomic-level accuracy in thickness control.
In its final analysis, the STDP reinforced synapses that propagated
signals most rapidly. It means that a nerve network is optimized to make
propagation of signals fast by STDP. In addition, it was concluded that the
hard reset type was most suitable for latency decrease effectiveness by STDP
among other memristors that had diverse properties. It showed that when it
comes to a change of weakening phenomenon of synapse, the bigger is the
better, and when it comes to a change of strengthening phenomenon of
synapse, the smaller is the better.
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College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Materials Science and Engineering (재료공학부)Theses (Ph.D. / Sc.D._재료공학부)
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