Rapid Atomic Layer Deposition of SiO2 Thin Films for High Productivity

Abstract

Silicon dioxide (SiO2) is one of the most widely used materials in the semiconductor industries. Its role includes use as gate dielectrics in metal oxide semiconductor field-effect transistors, dielectric layers in capacitors in dynamic random access memories, insulating layers between metal interconnects such as Al or Cu, and moisture barriers in organic light-emitting diodes and organic thinfilm transistors. There are several methods for forming SiO2 thin films, including thermal oxidation of Si, evaporation, chemical vapor deposition (CVD), plasma-enhanced CVD (PECVD), and atomic layer deposition (ALD). Among these, ALD has been highlighted as an ideal method for forming very conformal and ultrathin films in the continued scaling-down of semiconductor devices. ALD is a self-limiting technique, characterized by alternating exposure of the metal precursor and the reactant. However, the biggest hurdle for implementing ALD in semiconductor devices is its low growth per cycle (GPC), adding high costs for mass production. Much effort has therefore been made to increase the GPC of ALD SiO2, while maintaining good quality of the deposited films. Among them, D. Hausmann et al. reported rapid ALD (RALD) SiO2 growth using tris(tert-butoxy)silanol as the precursor, with the aid of trimethylaluminum (TMA) as a catalyst, achieving a GPC of ∼12 nm/cycle. In this case, it was noted that no oxidant gas was used for the growth, and it was argued that repeated insertions of silanol molecules into the Al-O bond led to the formation and subsequent cross-linking of siloxane polymers. Tris(tert-pentoxy) silanol (TPS) has also been used for RALD SiO2, with a GPC of ∼14 nm/cycle. These RALD processes have received much attention since self-limiting behavior is still maintained, while gaining a greater than 100-fold increase in terms of GPC. However, because ii extremely long pulses (10 - 110 sec) and purge times (10 - 600 sec) are needed for these silanol molecules, the actual growth per time do not fully satisfy the requirements of device fabrication. In this dissertation, study for productivity enhancement of RALD process by improving actual growth per time and for evaluating applicability of RALD SiO2 films as through-silicon via (TSV) insulating layer development were conducted. In the first part, a detailed re-examination of the TPS purge time was carried out to increase the actual growth per time for RALD SiO2. A short TPS purge time led to a decrease in the GPC of SiO2

this may be the result of consumption of TMA by reaction with water molecules remaining in the reaction chamber during insufficient purging. When a longer purge time is used, a decrease in GPC was observed, and this was attributed to the loss of surface hydroxyl groups, which act as chemisorption sites for TMA. Increasing the flow rate of Ar during the purge step enabled to obtain higher growth rate (about 2.4 times than normal purge) and the formation of high-quality SiO2 films in considerably shorter purge times. And O2 plasma step (10 - 30 sec) after a short TPS purge step (30 - 80 sec) was used instead of long TPS purge step (> 120 sec) in RALD process, which resulted in a increase (about 1.5 times than normal purge 120 sec) of GPC and improvement of etch resistance property (about 20% than no plasma process). Adoption of an O2 plasma step in RALD, it was revealed that O2 plasma changed unreacted or remained precursors (Si-CH3, CH3) to hydroxyl groups which can be a chemisorption sites for incoming TMA. In the second part, the experiments applied to various catalysts on RALD processes were conducted for evaluating the effect of catalysts on RALD process. Catalytic effect on RALD process originates from Lewis acid characteristic of each materials. Therefore it was reported that GPC of RALD process tended to be proportional to electronegativity iii related to Lewis acid strength. Improved GPC was observed in RALD process using Ga catalyst selected through considering the characteristic of catalyst materials. In the third part, experiments for evaluating applicability of RALD SiO2 films on TSV isolation process development were carried out. Conventional process for reducing leakage current occurred around the TSV electrode was in progress using PECVD. By replacing conventional PECVD process with RALD process, however, step coverage was much improved (~ 100%) in the deep via which had high aspect ratio. It also satisfied process development objective

high throughtput process at low temperature condition (< 300℃, ~12 nm/cycle) and I-V characteristic by manufacturing metal-oxide-semiconductor capacitor (MOSCAP) pattern (~ 3E-8A/cm2 at -3.3V). From this point of view, it is proposed that productivity of RALD process is high enough to apply for fabrication of semiconductor devices.