주파수 영역 해상도 확장 기법의 양자화 장치와 이에 기반한 고품질 오디오용 저 전압 시그마 델타 ADC 설계에 관한 연구

Abstract

This thesis proposes a way to design the multi-bit quantizer of sigma delta ADC with less number of comparators than that of the conventional design with performance improvement. The method uses error-feedback based sigma delta modulation and additional analog differentiator and a digital integrator. Applying this method to the quantizer of a sigma delta ADC, results in the quantizer resolution enhancement and the order of sigma delta modulator increment with high enough overall resolution enhancement enough to reduce the OSR of main sigma delta integrators. Based on the conventional design method, additional efforts added to precisely estimate the performance of designed sigma delta ADCs. The method is applied and confirmed in sigma delta ADC for consumer electrics audio application with less than 3 dB SNR difference. The ADC uses 3rd order, 256 OSR, 4 level quantizer to achieve over 90 dB SNR for audio applications. Psychoacoustic properties are concerned for better audible performance. Performance of SNR 94.3 dB and THD+N -91.3 dB are measured for the sigma delta ADC core. This ADC implemented on 0.13 μm CMOS mixed-signal process with 3.3 V supply voltage operation. The proposed quantizer is applied to a low voltage audio sigma delta ADC. The ADC uses 1.2 V supply voltage with 0.13 μm CMOS mixed-signal process. The 100 dB SNR ADC is designed using 2nd order, 64 OSR, the quantizer with 2 comparators and additional digital logics. As expected, the sigma delta modulator shows adequate signal to quantization noise ratio performance with the proposed quantizer so that OSR can be reduced. The design achieves 102.5 dB SNR and 99.4 dB SNDR.