S-Space College of Engineering/Engineering Practice School (공과대학/대학원) Dept. of Electrical and Computer Engineering (전기·정보공학부) Theses (Ph.D. / Sc.D._전기·정보공학부)
Field-Effect Transistors based on Organic and Carbon Nanotube for Memory Devices : 메모리 소자를 위한 유기물과 탄소 나노튜브 기반의 전계 효과 트랜지스터에 관한 연구
- 공과대학 전기·컴퓨터공학부
- Issue Date
- 서울대학교 대학원
- memory device ; thin-film transistor (TFTs) ; organic semiconductor ; graphene ; floating gate ; single-wall nanotube (SWCNT) ; inkjet-printing ; inverter ; static random access memory (SRAM)
- 학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2016. 2. 홍용택.
- With continued development in flexible and large area devices, there is increasing interest organic semiconductor materials and other semiconductor materials such as carbon based materials instead of traditional silicon based materials in electronic devices. These materials have intrinsic flexibility and versatile processing capability, which provide a broad range of applications in electronic device such as active-matrix organic light-emitting diode (AMOLED), logic circuit, and thin film transistors (TFTs) instead of conventional silicon based materials. Among these applications, TFTs are key elements for practical applications in flexible displays, logic circuits and memory applications such as memory transistors. In memory transistor devices, conventional thin films floating gate have been used for charge floating gate, but these conventional memory devices encounter difficulties of floating gate cell-to-cell interference and parasitic capacitance, and charge loss
these affect the overall device performance and reliability, when used with miniaturized cell sizes and in high densities. So many groups reported discrete nano-floating gate memory using metal nanoparticles such as gold nanoparticle because discrete nanoparticles have advantages that it is easy to control the trap density and distribution. Among the various potential candidates for the charge storage layer, graphene offers an advantage of introducing metallic properties. However, the two-dimensional continuous planar structure of graphene typically has difficulty in storing sufficient charge for non-volatile memory function, because the charge carrier stored in the continuous charge storage layer is easily lost through the thin tunneling dielectric. From this point, floating gate memory transistor using discrete charge floating gate are discussed by controlling synthesize of graphene in this thesis. We fabricated the graphene floating gate into the organic nonvolatile memory transistors (ONVMT) with bottom-gate/top-contact structure using pentacene and polystyrene (PS) as active and charge tunneling dielectric layers, respectively. For the floating gate, we proposed a discrete graphene layer formed by controlling growth time of the graphene layer during a conventional CVD process, and then simply transferring it onto the gate dielectric layer. The fabricated ONVMTs exhibited large memory windows (∼40 V) and a good data retention ability. The shift of the transfer curves at various gate biases indicated a clear charge-trapping and de-trapping behavior in the partially grown graphene within a short period of time (100 ms). The data retention properties of our devices showed an on/off ratio of about 5 × 104 even after 105 s, which leads to the estimated charge storage time of more than a year. The fabricated ONVMTs were reliable after more than one-hundred repeated programming/erasing cycle tests.
Furthermore, we also fabricated SWCNT transistors based on inkjet printing technology for logic circuit applications. The carbon nanotubes (CNTs) has been widely studied for many aspects in recent years for their unique properties, which are valuable for nanotechnology, electronics, optics and other fields of materials science and technology. In particular, single-walled carbon nanotubes (SWCNTs) shows high electrical conductivity or semiconducting behavior according to their rapping direction. From these electrical properties, SWCNTs, especially semiconducting SWCNTs, have been expected to be used as alternative semiconducting material for field effect transistors. Based on these backgrounds, we illustrated SWCNT transistors based on inkjet printing technology for high performance and uniformity and illustrated advantages of inkjet printing method compared to other deposition method. For successful inkjet printing of SWCNTs solution, we optimized jetting conditions such as ink jetting velocity and drop-space. In SWCNT transistor, it is critical that the ink wets the targeted surface uniformly since networks of SWCNTs are formed during the drying of the ink. To deposit high density and uniform SWCNT films on substrate, we used surface treatment with poly-L-lysine (PLL) to enhance adhesion between SWCNTs and substrate. Also for source and drain in SWCNT transistor, we deposited Ag using inkjet printing method. Fabricated device showed high electrical performance and high uniformity without additional patterning. Also from this inkjet-printed SWCNT transistor, we fabricated SWCNT circuit applications including inverter and SRAM by using inkjet-printing method. For full-swing SWCNT inverter, we used chemical encapsulation with ammonium hydroxide (NH4OH). Also using this full-swing inverter, we fabricated SWCNT RAM by connecting two inverters input and output.