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Fabrication of Nano-Wedge Structured Resistive Switching Memory and Analysis on Its Switching Characteristics : 나노 웨지 구조 기반 저항 변화 메모리 제작 및 이의 스위칭 특성 분석

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Authors

이동근

Advisor
박병국
Major
공과대학 전기·정보공학부
Issue Date
2017-02
Publisher
서울대학교 대학원
Keywords
Nano-WedgeResistive Switching MemoryCMPanisotropic wet-etchingtop electrodesilicon
Description
학위논문 (석사)-- 서울대학교 대학원 : 전기·정보공학부, 2017. 2. 박병국.
Abstract
Existing NAND flash memories based on silicon are encountering limitation for scaling and miniaturization, thus next-generation memories, such as PCRAM, STT-MRAM and ReRAM, are under an extensive research. In particular, the ReRAM (resistive switching memory) is raising as the strong candidate for next-generation memory due to its low-cost fabrication, simple structure, outstanding scaling, CMOS compatibility, fast switching speed and multibit storage ability.
In this thesis, a MIS (Metal-Insulator-Silicon) structured resistive switching memory is fabricated through modifying bottom electrode structure and analyzed resistive characteristics of the device. In detail, the fabricated resistive switching memory consists of silicon-based bottom electrode, silicon nitride as a switching layer and Titanium metal based top electrode. The bottom electrode structure can be changed to a Nano-Wedge structure by anisotropic wet-etching process using TMAH solution, which depends on silicon crystalline direction. After depositing TEOS on the device, CMP is carried out for planarization and exposing tip of the wedge to fabricate the resistive switching memory with a minimal programming voltage. Back-end process is performed according to the existing fabrication process, depositing a switching and metal layer to form the Nano-Wedge resistive switching memory.
The fabricated memory device is measured whether it is operated properly in a bipolar switching mode. Excellent data storage capability is proved through retention test by setting at a high temperature over 104 seconds in both LRS and HRS resistance states. A repetitive programming and erasing cycle process, known as an endurance test, is also performed to demonstrate outstanding characteristics of the resistive switching memory device. At the end, the ON/OFF ratio of the device was measured above 10^2.
Language
English
URI
https://hdl.handle.net/10371/122864
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