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Approximate Calculation of DCT for HEVC and JPEG Hardware Encoders : HEVC와 JPEG 하드웨어 부호화기를 위한 DCT의 Approximate Calculation

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Authors
아니쉬
Advisor
이혁재
Major
공과대학 전기·컴퓨터공학부
Issue Date
2015-08
Publisher
서울대학교 대학원
Keywords
Discrete Cosine TransformHEVCJPEGApproximate DCT
Description
학위논문 (석사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2015. 8. 이혁재.
Abstract
Discrete Cosine Transform (DCT) is widely used for various image and video compression applications because of its excellent energy compaction property. DCT is computationally intensive and the calculations are parallelizable. Therefore it is often implemented in hardware for speeding up the calculation. However due to large size of DCT or multiple modules of DCT required for some applications, the hardware area taken up by DCT in image or video encoders become significant. The DCT required in most applications doesnt need to be exact. Taking advantage of this fact, here a novel approach is provided to reduce the hardware area cost of the DCT module. The DCT hardware module consists of combinational logic and memory. Both the components are reduced and the complete implementation is described. The application being aimed at is for HEVC and JPEG, however the idea is applicable to any DCT hardware implementation. Finally the degradation caused to encoded image and video in terms of BDBR is discussed and the gate count results from the synthesis is provided.
Language
English
URI
https://hdl.handle.net/10371/123173
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College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Electrical and Computer Engineering (전기·정보공학부)Theses (Master's Degree_전기·정보공학부)
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