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Ranking process parameter association with low yield wafers using spec-out event network analysis
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Yang, Jiwon | - |
dc.contributor.author | Lee, Seungkyung | - |
dc.contributor.author | Kang, Seokho | - |
dc.contributor.author | Cho, Sungzoon | - |
dc.contributor.author | Lee, Younghak | - |
dc.contributor.author | Park, Haesang | - |
dc.creator | 조성준 | - |
dc.date.accessioned | 2019-04-24T23:02:14Z | - |
dc.date.available | 2020-04-05T23:02:14Z | - |
dc.date.created | 2018-09-11 | - |
dc.date.created | 2018-09-11 | - |
dc.date.issued | 2017-11 | - |
dc.identifier.citation | Computers and Industrial Engineering, Vol.113, pp.419-424 | - |
dc.identifier.issn | 0360-8352 | - |
dc.identifier.uri | https://hdl.handle.net/10371/148728 | - |
dc.description.abstract | In the semiconductor process, the time-series process sensor data such as temperature, pressure, and voltage, are analyzed, to find suspicious process parameters associated with low yield wafers. A common approach is to compute correlation between individual spec-out events and defect ratios. However, the downside with this approach is that it ignores interactions among spec-out events, leading to each spec-out event being independently administrated. In this paper, we propose a novel approach that incorporates the interactions among spec-out events using spec-out event network analysis. We construct a weighted directed graph in which a spec out event is represented as a node, a precedence relation between events as a directed edge, and the wafer defect ratio corresponding to the relation as an edge weight. In this graph, a more important node in the process will have more links from other succeeding nodes with high defect ratios. The PageRank algorithm run on this event network results in a ranking of association with wafer defects. We validated the performance using real-production data from a 32 nm device. The proposed method enables process engineers to determine the root causes of low yield wafers due to the interactions of the process steps. | - |
dc.language | 영어 | - |
dc.language.iso | en | en |
dc.publisher | Pergamon Press Ltd. | - |
dc.title | Ranking process parameter association with low yield wafers using spec-out event network analysis | - |
dc.type | Article | - |
dc.identifier.doi | 10.1016/j.cie.2017.09.036 | - |
dc.citation.journaltitle | Computers and Industrial Engineering | - |
dc.identifier.wosid | 000418207900032 | - |
dc.identifier.scopusid | 2-s2.0-85030127633 | - |
dc.description.srnd | OAIID:RECH_ACHV_DSTSH_NO:T201734252 | - |
dc.description.srnd | RECH_ACHV_FG:RR00200001 | - |
dc.description.srnd | ADJUST_YN: | - |
dc.description.srnd | EMP_ID:A004522 | - |
dc.description.srnd | CITE_RATE:3.195 | - |
dc.description.srnd | DEPT_NM:산업공학과 | - |
dc.description.srnd | EMAIL:zoon@snu.ac.kr | - |
dc.description.srnd | SCOPUS_YN:Y | - |
dc.citation.endpage | 424 | - |
dc.citation.startpage | 419 | - |
dc.citation.volume | 113 | - |
dc.description.isOpenAccess | N | - |
dc.contributor.affiliatedAuthor | Kang, Seokho | - |
dc.contributor.affiliatedAuthor | Cho, Sungzoon | - |
dc.identifier.srnd | T201734252 | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.subject.keywordPlus | STATISTICAL PROCESS-CONTROL | - |
dc.subject.keywordPlus | WEB | - |
dc.subject.keywordAuthor | Spec-out event | - |
dc.subject.keywordAuthor | Network analysis | - |
dc.subject.keywordAuthor | Process parameters | - |
dc.subject.keywordAuthor | Wafer yield | - |
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