High Mobility Amorphous Polymer-Based 3D Stacked Pseudo Logic Circuits through Precision Printing

Abstract

Direct printing of conjugated polymer thin-film transistors enables the fabrication of deformable devices with low cost, high throughput, and large area. However, a relatively poor device performance of printed devices remains a major obstacle to their application in high-end display backplanes and integrated circuits. In this study, high-performance and highly stackable printed organic transistors is developed, arrays, and circuits using a near-amorphous polymer, indacenodithiophene-co-benzothiadiazole (IDT-BT). The printed devices exhibited high saturation mobility (>1 cm(2) V-1 s(-1)), high on/off ratio (>10(7)), and low subthreshold slope (245 mV dec(-1)). In addition, 16 x 16 printed IDT-BT arrays achieved 100% fabrication yield, with excellent device-to-device uniformity and low variations of mobility (9.55%) and threshold voltage (4.51%), and good operational and environmental stability (>365 days). Furthermore, five stacked 3D transistors are demonstrated with an excellent 3D uniformity without compromising device performance due to a low required thermal budget for processing amorphous IDT-BT. Finally, a new concept of 3D universal logic gate with high voltage gain (33.91 V/V) and record density (100 printed transistors per cm(2)) is proposed and fabricated, which is relevant for the commercialization of low-cost printed display backplanes and high-density integrated circuits based on highly processable polymeric semiconductors.