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An 8-b nRERL Microprocessor for Ultra-Low-Energy Applications
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Seokkee | - |
dc.contributor.author | Chae, Soo-Ik | - |
dc.contributor.author | Kwon, Jun-Ho | - |
dc.date.accessioned | 2009-12-18T06:55:14Z | - |
dc.date.available | 2009-12-18T06:55:14Z | - |
dc.date.issued | 2001-12 | - |
dc.identifier.citation | Asia and South Pacific Design Automation Conference, pp.27-28 | en |
dc.identifier.uri | https://hdl.handle.net/10371/21395 | - |
dc.description.abstract | We describe the design of an nRERL microprocessor for
ultra-low-energy applications. nRERL (nMOS Reversible Energy Recovery Logic) is a new reversible adiabatic logic circuit using only nMOS transistors, which can be operated at the leakage-current level [1]. We focus on two main issues; first, the design of a full adiabatic microprocessor, which uses only adiabatic components for all the functional blocks, second, the energy consumption of the nRERL microprocessor including its clocked power generator (CPG). With the experimental results, the nRERL microprocessor consumed 26.22 pJ at 440 kHz. | en |
dc.language.iso | en | - |
dc.title | An 8-b nRERL Microprocessor for Ultra-Low-Energy Applications | en |
dc.type | Conference Paper | en |
dc.contributor.AlternativeAuthor | 김석기 | - |
dc.contributor.AlternativeAuthor | 채수익 | - |
dc.contributor.AlternativeAuthor | 권준호 | - |
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