Single Transistor Latch Near 1 V With Asymmetric Biasing in a MOSFET

Abstract

A single transistor latch (STL), driven by impact ionization (II) and band-to-band tunneling (BTBT), plays a crucial role in threshold switching in a thin-body MOSFET. The inherent challenge lies in the high latch-up voltage (VLU) LU ) required to trigger the STL because the II and BTBT mechanisms rely on higher voltages. Moreover, thus far, strategies for adjusting the V LU level have been limited to altering process parameters or materials that are difficult to change once decided. Therefore, these methods do not provide dynamic controllability of VLU. LU . The high V LU and lack of tunability limit and hinder various applications utilizing STL. In this study, V LU was experimentally reduced to near 1 V by asymmetric biasing, i.e., electrically separating the top of the body (ToB) and the bottom of the body (BoB) through front-gate (FG) biasing and back-gate (BG) biasing. The underlying physics of this reduction was elucidated by means of TCAD simulation through the analysis of energy band diagrams, II rates, and BTBT rates. A significant reduction in V LU was achieved solely through electrical modulation.