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Showing results 1 to 4 of 4

Issue Date	Title / Author(s) / Citation	File
2015-04	A Calibration-Free Fractional-N Ring PLL Using Hybrid Phase/Current-Mode Phase Interpolation Method Nandwana, Romesh Kumar; Anand, Tejasvi; Saxena, Saurabh; Kim, Seong-Joong; Talegaonkar, Mrunmay; Elkholy, Ahmed; Choi, Woo Seok; Elshazly, Amr; Hanumolu, Pavan Kumar IEEE Journal of Solid-State Circuits, Vol.50 No.4, pp.882-895	DOI
2020-08	A 12-Gb/s 10-ns Turn-On Time Rapid ON/OFF Baud-Rate DFE Receiver in 65-nm CMOS Kim, Dongwook; Ahmed, Mostafa G.; Choi, Woo-Seok; Elkholy, Ahmed; Hanumolu, Pavan Kumar IEEE Journal of Solid-State Circuits, Vol.55 No.8, pp.2196-2205	DOI
2020-10	A 0.83-pJ/Bit 6.4-Gb/s HBM Base Die Receiver Using a 45 degrees Strobe Phase for Energy-Efficient Skew Compensation Lee, Sangyoon; Ko, Han-Gon; Chae, Joo-Hyung; Shin, Soyeong; Yun, Jaekwang; Jeong, Deog-Kyoon; Kim, Suhwan IEEE Transactions on Circuits and Systems II: Express Briefs, Vol.67 No.10, pp.1735-1739	DOI
2022-09	A 32-Gb/s PAM4-Binary Bridge With Sampler Offset Cancellation for Memory Testing Yun, Daeho; Lee, Eonhui; Jung, Woosong; Kim, Kahyun; Beak, Kyung-Min; Kim, Jihee; Lee, Hyun-Bae; Ko, Byeongseon; Choi, Woo-Seok; Jeong, Deog-Kyoon IEEE Transactions on Circuits and Systems II: Express Briefs, Vol.69 No.9, pp.3749-3753	DOI