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Performance-driven high-level synthesis with system clock optimization : 시스템 클록 최적화를 활용한 성능위주의 상위수준합성
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- Authors
- Advisor
- 최기영
- Issue Date
- 1999
- Publisher
- 서울대학교 대학원
- Keywords
- 상위수준합성 ; high-level synthesis ; 스케쥴링 ; scheduling ; 제어합성 ; control-synthesis ; 시스템클록 최적화 ; bit-level chaining ; 유한상태머신합성 ; system clock optimization
- Description
- Thesis (doctoral)--서울대학교 대학원 :전자공학과,1999.
- Language
- English
- URI
- http://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000074310
https://hdl.handle.net/10371/30806
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