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High-level synthesis of partitioned bus architecture : 분할 버스 아키텍처의 상위 수준 합성
DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | 최기영 | - |
dc.contributor.author | 김용주 | - |
dc.date.accessioned | 2010-01-15T04:22:21Z | - |
dc.date.available | 2010-01-15T04:22:21Z | - |
dc.date.copyright | 2000. | - |
dc.date.issued | 2000 | - |
dc.identifier.uri | http://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000069760 | eng |
dc.identifier.uri | https://hdl.handle.net/10371/30901 | - |
dc.description | Thesis (doctoral)--서울대학교 대학원 :전기공학부,2000. | en |
dc.format.extent | vii, 76 p. | en |
dc.language.iso | en | en |
dc.publisher | 서울대학교 대학원 | en |
dc.subject | High-level synthesis | en |
dc.subject | partitioned bus architecture | en |
dc.subject | Design Space Exploration | en |
dc.subject | Genetic Algorithm | en |
dc.subject | Wordlength Optimization | en |
dc.title | High-level synthesis of partitioned bus architecture | en |
dc.title.alternative | 분할 버스 아키텍처의 상위 수준 합성 | - |
dc.type | Thesis | - |
dc.contributor.department | 전기공학부 | - |
dc.description.degree | Doctor | en |
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