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차세대 DRAM을 위한 수직 트랜지스터 설계

DC Field Value Language
dc.contributor.advisor박영준-
dc.contributor.author이창훈-
dc.date.accessioned2010-01-15T04:35:47Z-
dc.date.available2010-01-15T04:35:47Z-
dc.date.copyright2001.-
dc.date.issued2001-
dc.identifier.urihttp://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000065191kor
dc.identifier.urihttps://hdl.handle.net/10371/31111-
dc.description학위논문(석사)--서울대학교 대학원 :전기.컴퓨터공학부,2001.ko
dc.format.extentii, 43 장ko
dc.language.isokoko
dc.publisher서울대학교 대학원ko
dc.subjectDRAMko
dc.subjectcellko
dc.subjectvertical transisterko
dc.subjecttrenchko
dc.subjectthreshold voltageko
dc.subjectDIBLko
dc.subjectsubthreshold swingko
dc.title차세대 DRAM을 위한 수직 트랜지스터 설계ko
dc.typeThesis-
dc.contributor.department전기.컴퓨터공학부-
dc.description.degreeMasterko
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