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Partitioned-bus architecture synthesis based on transfer model : 데이터 전달을 기반으로 하는 분할버스 구조합성
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 최기영 | - |
| dc.contributor.author | 이승열 | - |
| dc.date.accessioned | 2010-01-19T06:04:21Z | - |
| dc.date.available | 2010-01-19T06:04:21Z | - |
| dc.date.copyright | 2000. | - |
| dc.date.issued | 2000 | - |
| dc.identifier.uri | http://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000069619 | eng |
| dc.identifier.uri | https://hdl.handle.net/10371/37825 | - |
| dc.description | Thesis (master`s)--서울대학교 대학원 :전기공학부,2000. | en |
| dc.format.extent | vi, 40 p. | en |
| dc.language.iso | en | en |
| dc.publisher | 서울대학교 대학원 | en |
| dc.title | Partitioned-bus architecture synthesis based on transfer model | en |
| dc.title.alternative | 데이터 전달을 기반으로 하는 분할버스 구조합성 | - |
| dc.type | Thesis | - |
| dc.contributor.department | 전기공학부 | - |
| dc.description.degree | Master | en |
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