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Performance analysis of orthogonal multi-carrier DSCDMA systems with chip timing jitter : 직교 다중 반송파 DSCDMA 시스템에서 칩 타이밍 지터가 있을 때의 성능 분석

DC Field Value Language
dc.contributor.advisor이광복-
dc.contributor.author성기범-
dc.date.accessioned2010-01-25-
dc.date.available2010-01-25-
dc.date.copyright1999.-
dc.date.issued1999-
dc.identifier.urihttp://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000072960eng
dc.identifier.urihttps://hdl.handle.net/10371/43128-
dc.descriptionThesis (master`s)--서울대학교 대학원 :전기공학부,1999.en
dc.format.extentv, 39 p.en
dc.language.isoenen
dc.publisher서울대학교 대학원en
dc.titlePerformance analysis of orthogonal multi-carrier DSCDMA systems with chip timing jitteren
dc.title.alternative직교 다중 반송파 DSCDMA 시스템에서 칩 타이밍 지터가 있을 때의 성능 분석-
dc.typeThesis-
dc.contributor.department전기공학부-
dc.description.degreeMasteren
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