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전원노이즈 감소를 위한 클락 버퍼의 크기 조절 및 위상 지정 기법 : Simultaneous Buffer Sizing and Polarity Assignment for Noise Minimization in Clock Tree Synthesis
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- Authors
- Advisor
- 김태환
- Issue Date
- 2009
- Publisher
- 서울대학교 대학원
- Keywords
- 클락트리 ; Clock Tree ; 클락버퍼 ; Clock Buffer ; 노이즈 ; Power-Ground Noise
- Description
- 학위논문(석사) --서울대학교 대학원 :전기. 컴퓨터공학부, 2009.2.
- Language
- Korean
- URI
- http://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000037081
https://hdl.handle.net/10371/44723
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