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Low-power instruction fetch techniques for embedded processors : 내장형 프로세서를 위한 저전력 명령어 인출 기법
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- Authors
- Advisor
- 전주식
- Issue Date
- 2006
- Publisher
- 서울대학교 대학원
- Keywords
- 컴퓨터 구조 ; computer architecture ; 저전력 시스템 ; low-power design ; 내장형 프로세서 ; embedded processor ; 분기 예측기 ; branch predictor ; 명령어 캐쉬 ; instruction cache
- Description
- Thesis(doctoral)--서울대학교 대학원 :전기·컴퓨터공학부,2006.
- Language
- English
- URI
- http://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000046571
https://hdl.handle.net/10371/45374
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