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Synchronous mirror delay를 이용한 클럭 발생기의 설계 : Design of clock generator using synchronous mirror delay
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 이종덕 | - |
| dc.contributor.author | 윤용진 | - |
| dc.date.accessioned | 2010-02-02T16:08:18Z | - |
| dc.date.available | 2010-02-02T16:08:18Z | - |
| dc.date.copyright | 2004 | - |
| dc.date.issued | 2004 | - |
| dc.identifier.other | 000000054000 | - |
| dc.identifier.uri | http://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000054000 | - |
| dc.description | 학위논문(박사)--서울대학교 대학원 :전기공학부,2004. | - |
| dc.format.extent | iv, 93 p. | - |
| dc.language.iso | ko | - |
| dc.publisher | 서울대학교 대학원 | - |
| dc.subject | Synchronous mirror delay | - |
| dc.subject | Synchronous mirror delay | - |
| dc.subject | Double data rate | - |
| dc.subject | Double data rate | - |
| dc.subject | Delay locked loop | - |
| dc.subject | Delay locked loop | - |
| dc.subject | Clock recovery circuit | - |
| dc.subject | Clock recovery circuit | - |
| dc.subject | 다중 위상 동기 | - |
| dc.subject | Multi-phase locking | - |
| dc.subject | 동기 메모리 | - |
| dc.subject | Sync memory | - |
| dc.subject | 동기 오차 | - |
| dc.subject | Synchronizing error | - |
| dc.subject | Jitter | - |
| dc.subject | Jitter | - |
| dc.title | Synchronous mirror delay를 이용한 클럭 발생기의 설계 | - |
| dc.title.alternative | Design of clock generator using synchronous mirror delay | - |
| dc.type | Thesis | - |
| dc.contributor.department | 전기공학부 | - |
| dc.description.degree | 학위논문(박사)-- | - |
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