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College of Engineering/Engineering Practice School (공과대학/대학원)
Dept. of Electrical and Computer Engineering (전기·정보공학부)
Theses (Ph.D. / Sc.D._전기·정보공학부)
Multiple-valued logics based on SETCMOS hybrid architecture : 단전자 및 CMOS 트랜지스터의 하이브리드 구조에 기반한 다중-레벨 로직
- Authors
- Advisor
- 박병국
- Issue Date
- 2005
- Publisher
- 서울大學校 大學院
- Keywords
- CMOS 기술 ; Single-electron transistor (SET) ; 양자 효과 ; MOSFETs ; 양자 터널링 ; tunneling ; 양자 점 ; Coulombblockade ; 단전자 트랜지스터 ; hybrid integrated circuits ; MOSET ; multiple-valued logic ; 전하 차폐 ; filter. ; 모델링 ; 하이브리드 ; Multiple-valued logic
- Description
- 학위논문(박사)--서울大學校 大學院 :電氣·컴퓨터工學部,2005.
- Language
- Korean
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