S-Space College of Engineering/Engineering Practice School (공과대학/대학원) Dept. of Computer Science and Engineering (컴퓨터공학부) Journal Papers (저널논문_컴퓨터공학부)
Efficient Register Mapping and Allocation in LaTTe, an Open-Source Java Just-in-Time Compiler
- Yang, Byung-Sun; Lee, Junpyo; Lee, SeungIl; Park, Seongbae; Chung, Yoo C.; Kim, Suhyun; Ebciogulu, Kemal; Altman, Erik; Moon, Soo-Mook
- Issue Date
- IEEE Transactions on Parallel and Distributed Systems, vol. 18 no. 1, pp. 57-69
- Java virtual machine; just-in-time compilation; register mapping; register allocation; copy coalescing.
- IEEE Transactions on Parallel and Distributed Systems
Volume 18 , Issue 1 (January 2007)
- Java just-in-time (JIT) compilers improve the performance of a Java virtual machine (JVM) by translating Java bytecode into native machine code on demand. One important problem in Java JIT compilation is how to map stack entries and local variables to registers efficiently and quickly, since register-based computations are much faster than memory-based ones, while JIT compilation overhead is part of the whole running time. This paper introduces LaTTe, an open-source Java JIT compiler that performs fast generation of efficiently register-mapped RISC code. LaTTe first maps "all local variables and stack entries into pseudoregisters, followed by real register allocation which also coalesces copies corresponding to pushes and pops between local variables and stack entries aggressively. Our experimental results indicate that LaTTe's sophisticated register mapping and allocation really pay off, achieving twice the performance of a naive JIT compiler that maps all local variables and stack entries to memory. It is also shown that LaTTe makes a reasonable trade-off between quality and speed of register mapping and allocation for the bytecode. We expect these results will also be beneficial to parallel and distributed Java computing 1) by enhancing single-thread Java performance and 2) by significantly reducing the number of memory accesses which the rest of the system must properly order to maintain coherence and keep threads synchronized.
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