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Showing results 1 to 13 of 13

Issue Date	Title / Author(s) / Citation	File	Altmetrics
2013-06	A 5Gb/s 2.6mW/Gb/s reference-less half-rate PRPLL-based digital CDR Shu, Guanghua; Saxena, Saurabh; Choi, Woo-Seok; Talegaonkar, Mrumnay; Inti, Rajesh; Elshazly, Amr; Young, Brian; Hanumolu, Pavan Kumar IEEE Symposium on VLSI Circuits, Digest of Technical Papers, p. 6578694
2013-06	A fast power-on 2.2Gb/s burst-mode digital CDR with programmable input jitter filtering Choi, Woo Seok; Anand, Tejasvi; Shu, Guanghua; Hanumolu, Pavan Kumar IEEE Symposium on VLSI Circuits, Digest of Technical Papers, pp.C280-C281
2014-02	8.7 A 4-to-10.5Gb/s 2.2mW/Gb/s continuous-rate digital CDR with automatic frequency acquisition in 65nm CMOS Shu, Guanghua; Choi, Woo-Seok; Saxena, Saurabh; Anand, Tejasvi; Elshazly, Amr; Hanumolu, Pavan Kumar Digest of Technical Papers - IEEE International Solid-State Circuits Conference, Vol.57, pp.150-151	DOI
2014-04	A Reference-Less Clock and Data Recovery Circuit Using Phase-Rotating Phase-Locked Loop Shu, Guanghua; Saxena, Saurabh; Choi, Woo Seok; Talegaonkar, Mrunmay; Inti, Rajesh; Elshazly, Amr; Young, Brian; Hanumolu, Pavan Kumar IEEE Journal of Solid-State Circuits, Vol.49 No.4, pp.1036-1047	DOI
2015-02	A 0.45-to-0.7V 1-to-6Gb/s 0.29-to-0.58pJ/b Source-Synchronous Transceiver Using Automatic Phase Calibration in 65nm CMOS Choi, Woo Seok; Shu, Guanghua; Talegaonkar, Mrunmay; Liu, Yubo; Wei, Da; Benini, Luca; Hanumolu, Pavan Kumar Digest of Technical Papers - IEEE International Solid-State Circuits Conference, Vol.58, pp.66-67	DOI
2015-03	A Burst-Mode Digital Receiver With Programmable Input Jitter Filtering for Energy Proportional Links Choi, Woo Seok; Anand, Tejasvi; Shu, Guanghua; Elshazly, Amr; Hanumolu, Pavan Kumar IEEE Journal of Solid-State Circuits, Vol.50 No.3, pp.737-748	DOI
2015-08	A 2.8mW/Gb/s 14Gb/s Serial Link Transceiver in 65nm CMOS Saxena, Saurabh; Shu, Guanghua; Nandwana, Romesh Kumar; Talegaonkar, Mrunmay; Elkholy, Ahmed; Anand, Tejasvi; Kim, Seong Joong; Choi, Woo Seok; Hanumolu, Pavan Kumar IEEE Symposium on VLSI Circuits, Digest of Technical Papers, pp.C352-C353	DOI
2016-02	A 4-to-10.5 Gb/s Continuous-Rate Digital Clock and Data Recovery With Automatic Frequency Acquisition Shu, Guanghua; Choi, Woo Seok; Saxena, Saurabh; Talegaonkar, Mrunmay; Anand, Tejasvi; Elkholy, Ahmed; Elshazly, Amr; Hanumolu, Pavan Kumar IEEE Journal of Solid-State Circuits, Vol.51 No.2, pp.428-439	DOI
2016-02	A 16Mb/s-to-8Gb/s 14.1-to-5.9pJ/b Source Synchronous Transceiver Using DVFS and Rapid On/Off in 65nm CMOS Shu, Guanghua; Choi, Woo Seok; Saxena, Saurabh; Kim, Seong-Joong; Talegaonkar, Mrunmay; Nandwana, Romesh; Elkholy, Ahmed; Wei, Da; Nandi, Timir; Hanumolu, Pavan Kumar Digest of Technical Papers - IEEE International Solid-State Circuits Conference, Vol.59, pp.398-U558
2016-10	Digital Clock and Data Recovery Circuits for Optical Links Shu, Guanghua; Choi, Woo Seok; Hanumolu, Pavan Kumar Technical Digest - IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC, pp.126-129	DOI
2017-05	A 2.8 mW/Gb/s, 14 Gb/s Serial Link Transceiver Saxena, Saurabh; Shu, Guanghua; Nandwana, Romesh Kumar; Talegaonkar, Mrunmay; Elkholy, Ahmed; Anand, Tejasvi; Choi, Woo Seok; Hanumolu, Pavan Kumar IEEE Journal of Solid-State Circuits, Vol.52 No.5, pp.1399-1411	DOI
2017-05	A 45-75MHz 197-452μW oscillator with 164.6dB FoM and 2.3psrms period jitter in 65nm CMOS Zhu, Junheng; Mahalley, Makrand; Shu, Guanghua; Choi, Woo Seok; Nandwana, Romesh Kumar; Elkholy, Ahmed; Sahoo, Bibhudatta; Hanumolu, Pavan Kumar Proceedings of the Custom Integrated Circuits Conference, Vol.2017-April, p. 7993679	DOI
2018-03	A 0.45-0.7 V 1-6 Gb/s 0.29-0.58 pJ/b Source-Synchronous Transceiver Using Near-Threshold Operation Choi, Woo Seok; Shu, Guanghua; Talegaonkar, Mrunmay; Liu, Yubo; Wei, Da; Benini, Luca; Hanumolu, Pavan Kumar IEEE Journal of Solid-State Circuits, Vol.53 No.3, pp.884-895	DOI

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