S-Space

Browse

Subject

Showing results 1 to 4 of 4

Issue Date	Title / Author(s) / Citation	File
2010-11	A 0.3–1.4 GHz All-Digital Fractional-N PLL With Adaptive Loop Gain Controller Kim, Deok-Soo; Song, Heesoo; Kim, Taeho; Kim, Suhwan; Jeong, Deog-Kyoon IEEE Journal of Solid State Circuits, vol.45, no.11, pp. 2300-2311	DOI
2015-04	A 3.7 mW Low-Noise Wide-Bandwidth 4.5 GHz Digital Fractional-N PLL Using Time Amplifier-Based TDC Elkholy, Ahmed; Anand, Tejasvi; Choi, Woo Seok; Elshazly, Amr; Hanumolu, Pavan Kumar IEEE Journal of Solid-State Circuits, Vol.50 No.4, pp.867-881	DOI
2017-09	A 5GHz Digital Fractional-N PLL Using a 1-bit Delta-Sigma Frequency-to-Digital Converter in 65 nm CMOS Talegaonkar, Mrunmay; Anand, Tejasvi; Elkholy, Ahmed; Elshazly, Amr; Nandwana, Romesh Kumar; Saxena, Saurabh; Young, Brian; Choi, Woo Seok; Hanumolu, Pavan Kumar IEEE Journal of Solid-State Circuits, Vol.52 No.9, pp.2306-2320	DOI
2022-10	Impact of PI Nonlinearity on High-Resolution Frequency-to-Digital Converter Ahn, Honggyoo; Song, Joonghyun; Choi, Woo Seok International SoC Design Conference, ISOCC, pp.141-142	DOI