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A 64Gb/s 2.29pJ/b PAM-4 VCSEL Transmitter With 3-Tap Asymmetric FFE in 65nm CMOS
Cited 13 time in
Web of Science
Cited 14 time in Scopus
- Authors
- Issue Date
- 2019-06
- Publisher
- IEEE
- Citation
- 2019 SYMPOSIUM ON VLSI CIRCUITS, pp.C268-C269
- Abstract
- This paper presents a 64Gb/s, 2.29pJ/b PAM-4 optical transmitter (TX) utilizing a VCSEL. To improve the power efficiency, the TX adopts a quarter-rate architecture consisting of a quadrature clock generator and a 4:1 MUX. By employing an asymmetric push-pull FFE, high-speed PAM-4 signaling based on a VCSEL can be achieved. It is fabricated in a 65nm CMOS technology, occupying an active area of 0.278mm(2).
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