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Pipelined priority queue architecture with 2 stage priority bitmap for high-speed packet switches
고속 패킷 스위치를 위하여 파이프라이닝과 2단계 우선순위 비트맵을 이용한 우선순위 큐

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Authors
이철기
Advisor
정덕균
Issue Date
2002
Publisher
서울대학교 대학원
Description
Thesis (master`s)--서울대학교 대학원 :전기·컴퓨터공학부,2002.
Language
English
URI
http://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000062176

http://hdl.handle.net/10371/36843
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College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Electrical and Computer Engineering (전기·정보공학부)Theses (Master's Degree_전기·정보공학부)
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