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An 8 x 8 nRERL serial multiplier for ultra-low-power applications

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Authors
Lim, Joonho; Kim, Donggyu; Kang, Sangcheol; Chae, Soo-Ik
Issue Date
2000-01
Publisher
IEEE
Citation
Proc. of ASP-DAC'98, pp.35-36
Abstract
An 8 x 8-b nRERL serial multiplier is
implemented in a 0.6- m n-well 3-metal CMOS pro-
cess. nRERL (nMOS Reversible Energy Recov ery
Logic) is a new reversible adiabatic logic circuit, which
can be operated at the leakage-current lev el for ultra-
low-energy applications. Measurement results show ed
that the nRERL serial multiplier consumed only 0.9
% of the energy dissipation of the static CMOS one
at the operating frequency 100 kHz at 5V, where its
adiabatic and leakage losses were about equal.
Language
English
URI
http://hdl.handle.net/10371/62268
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College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Electrical and Computer Engineering (전기·정보공학부)Others_전기·정보공학부
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