Browse

Hardware implementation of inter-processor communication in MPSoCs for multimedia applications

Cited 0 time in Web of Science Cited 0 time in Scopus
Authors
Koo, Moonmo; Chae, Soo-Ik
Issue Date
2007-07
Citation
International Technical Conference on Circuits/Systems, Computers and Communications
Abstract
In this paper we present a scalable and flexible architecture
that implements inter-processor communication (IPC) synchronization
among FIFO channels for multimedia applications. We also compare it
to the simple mail-box architecture, especially for tasks of finer
granularity. With experimental results we confirmed the proposed
architecture is suitable for various cases including a Motion JPEG
example.
Language
English
URI
http://hdl.handle.net/10371/62296
Files in This Item:
Appears in Collections:
College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Electrical and Computer Engineering (전기·정보공학부)Others_전기·정보공학부
  • mendeley

Items in S-Space are protected by copyright, with all rights reserved, unless otherwise indicated.

Browse