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High-Speed 10-bit LCD Column Driver with a Split DAC and a Class-AB Output Buffer

Cited 21 time in Web of Science Cited 24 time in Scopus
Authors

Woo, Jong-Kwan; Shin, Dong-yong; Jeong, Deog-Kyoon; Kim, Suhwan

Issue Date
2009-08
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
IEEE Transactions on Consumer Electronics, vol. 55, no. 3, pp. 1431-1438
Keywords
LCD driver ICDACgamma correctionclass-AB
Abstract
We propose a high-speed rail-to-rail 10-bit
column driver with a reduced die area for LCD-TV
applications. This column driver combines an 8-bit resistorstring
digital-to-analog converter (R-DAC), constructed using
a hybrid-type decoder to reduce the RC time delay and die
area, with a 2-bit interpolation DAC. In the output buffer,
error amplifiers drive a column line so as to realize a highspeed
rail-to-rail drive. Gamma-corrected output voltages are
generated by the resistor string of R-DAC, which contains
resistors of unequal values that match the inverse of the liquid
crystal transmittance-voltage characteristic. A prototype 10-
bit LCD column driver was designed and fabricated using a
0.3μm CMOS technology, and has a settling time of within
2μs and a quiescent current of 5.4μA per channel.
ISSN
0098-3063
Language
English
URI
https://hdl.handle.net/10371/67675
DOI
https://doi.org/10.1109/TCE.2009.5278010
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