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Showing results 1 to 6 of 6

Issue Date	Title / Author(s) / Citation	File	Altmetrics
2022	A 97fsrms-Jitter and 68-Multiplication Factor, 8.16GHz Ring-Oscillator Injection-Locked Clock Multiplier with Power-Gating Injection-Locking and Background Multi-Functional Digital Calibrator Park, Suneui; Yoo, Seyeon; Shin, Yuhwan; Lee, Jeonghyun; Choi, Jaehyouk Digest of Technical Papers - IEEE International Solid-State Circuits Conference, Vol.2022-February, pp.212-214	DOI
2022-10	A Sub-100 fs-Jitter 8.16-GHz Ring-Oscillator-Based Power-Gating Injection-Locked Clock Multiplier With the Multiplication Factor of 68 Park, Suneui; Yoo, Seyeon; Shin, Yuhwan; Lee, Jeonghyun; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS	DOI
2023	A 135fsrms-Jitter 0.6-to-7.7GHz LO Generator Using a Single LC-VCO-Based Subsampling PLL and a Ring-Oscillator-Based Sub-Integer-N Frequency Multiplier Jo, Yongwoo; Kim, Juyeop; Shin, Yuhwan; Hwang, Chanwoong; Park, Hangi; Choi, Jaehyouk Digest of Technical Papers - IEEE International Solid-State Circuits Conference, Vol.2023-February, pp.76-78	DOI
2023-02	28.5 A 900μW, 1-4GHz Input-Jitter-Filtering Digital-PLL-Based 25%-Duty-Cycle Quadrature-Clock Generator for Ultra-Low-Power Clock Distribution in High-Speed DRAM Interfaces Shin, Yuhwan; Jo, Yongwoo; Kim, Juyeop; Lee, Junseok; Kim, Jongwha; Choi, Jaehyouk Digest of Technical Papers - IEEE International Solid-State Circuits Conference, Vol.2023-February, pp.408-410	DOI
2023-12	A Wideband LO Generator for 5G FR1 Bands Using a Single <i>LC</i>-VCO-Based Subsampling PLL and a Ring-VCO-Based Fractional-Resolution Frequency Multiplier Jo, Yongwoo; Kim, Juyeop; Shin, Yuhwan; Park, Hangi; Hwang, Chanwoong; Lim, Younghyun; Choi, Jaehyouk IEEE Journal of Solid-State Circuits, Vol.58 No.12, pp.3338-3350	DOI
2024-02	10.5 A 76 fsrms- Jitter and -65dBc- Fractional-Spur Fractional-N Sampling PLL Using a Nonlinearity-Replication Technique Shin, Yuhwan; Lee, Junseok; Kim, Juyeop; Jo, Yongwoo; Choi, Jaehyouk Digest of Technical Papers - IEEE International Solid-State Circuits Conference, pp.196-198	DOI

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