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Issue Date	Title / Author(s) / Citation	File
2022-12	A Low-Jitter Ring-DCO-Based Fractional-<i>N</i> Digital PLL With a 1/8 DTC-Range-Reduction Technique Using a Quadruple-Timing-Margin Phase Selector Park, Hangi; Hwang, Chanwoong; Seong, Taeho; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.57 No.12, pp.3527-3537	DOI
2023-12	A Wideband LO Generator for 5G FR1 Bands Using a Single <i>LC</i>-VCO-Based Subsampling PLL and a Ring-VCO-Based Fractional-Resolution Frequency Multiplier Jo, Yongwoo; Kim, Juyeop; Shin, Yuhwan; Park, Hangi; Hwang, Chanwoong; Lim, Younghyun; Choi, Jaehyouk IEEE Journal of Solid-State Circuits, Vol.58 No.12, pp.3338-3350	DOI
2024-02	A 12.8-15.0-GHz Low-Jitter Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancellation Kim, Juyeop; Jo, Yongwoo; Park, Hangi; Seong, Taeho; Lim, Younghyun; Choi, Jaehyouk IEEE Journal of Solid-State Circuits, Vol.59 No.2, pp.424-434	DOI