S-Space College of Engineering/Engineering Practice School (공과대학/대학원) Dept. of Material Science and Engineering (재료공학부) Theses (Ph.D. / Sc.D._재료공학부)
Electrical characteristics of SnOx transparent p-type semiconductor for thin film transistor applications
트랜지스터용 p-형 주석 산화물 투명 반도체의 전기적 특성
- 공과대학 재료공학부
- Issue Date
- 서울대학교 대학원
- Tin oxide; p-type oxide semiconductor; thin film transistor; complementary metal oxide semiconductor; oxygen pressure; annealing temperature; interface layer
- 학위논문 (박사)-- 서울대학교 대학원 : 재료공학부, 2016. 8. 김형준.
- This dissertation investigates the structural, chemical and electrical properties of reactive sputtered SnOx films at the various oxygen partial pressure (Po) and post annealing temperature (TA) for the potential p-channel oxide thin-film transistors. In addition, this dissertation also discusses the effect of the various interface layers on the electrical functionality of p-type SnOx TFTs.
The 210 ℃ annealed SnOx film prepared at the low Po of 4% consisted of the dendrite morphology and metal Sn cluster. The resulting p-channel SnOx thin-film transistors (TFTs) suffered from the marginal mobility and low ION/OFF ratio, suggesting that these structural imperfections caused by the oxygen deficient non-stoichiometry hindered the effective hole carrier conduction and acted as the bulk trap states. The dendrite structure and metallic Sn cluster in the 210 ℃ annealed SnOx could be eliminated by increasing Po. Thus, the TFT with the p-type SnOx film prepared at the high Po = 8 % exhibited the high mobility of 2.8 cm2V-1s-1 and excellent ION/OFF ratio of ~10^3, which underscored the critical role of the homogeneous ordered structure without the Sn metal aggregate and abrupt dendrite structure. For the given optimal Po (= 8 %) condition, the device performances such as the μFE and ION/OFF ratio of the p-channel SnOx TFTs were deteriorated with increasing TA from 210 to 300 ℃, which was attributed to the disproportionation reaction [2SnO → SnO2+ Sn].
In addition, the complementary metal oxide semiconductor (CMOS) inverter using p-type SnOx and n-type Zn-Sn-O (ZTO) thin films was demonstrated with the peak gain of -4.4. These results are comparable to those of other oxide CMOS reported previously.
The effect of various interface layers, such as thermally-grown SiO2, 7 nm-SiNx, Al2O3 and SiOF, on the bottom gate SnOx TFT functionality was also studied.
SnOx TFTs showed quite different electrical functionalities according to interface layers. The SnOx TFT on the thermally-grown SiO2 showed μFE of 2.8 cm2V-1S-1 and ION/OFF of 1.8×10^3 and Vth of 19 V. However, the SnOx TFT on SiNx showed marginal functionality. The μFE, ION/OFF and Vth were degraded to 2.1 cm2V-1S-1, 7.9 and over 40V, respectively. Conversely, the SnOx TFT on SiOF exhibited best performance. The μFE and ION/OFF were 3.1 cm2V-1S-1 and 1.6×10^3, respectively. Interestingly, the Vth was shifted to 2 V.
From the XPS analyses and the resulting relative band structure, it was found that the marginal performance of SiNx interface was originated from relatively small valence band offset and large tail state over VBM of SiNx.
The fixed oxide charge and interface dipole, which could modulate flat band voltage, could not be causes of Vth shift in p-type SnOx TFT on SiOF interface, because n-type ZTO TFT on SiOF did not show any Vth shift. To explain Vth shift in SiOF, Fermi level pinning at the interface was also suggested. High Vth of 19 V in SnOx TFT on SiO2 might be attributed by Fermi level pinning near the VBM. However, in SiOF, fluorine atoms help reducing defect density at bulk or surface in the band gap. Therefore, Fermi level is less pinned near VBM and Vth can be shifted in negative direction (19 → 2 V). The explanation well supports the estimated Dit, max : 2.5 × 1013 (SiO2) → 1.9 × 1013 (SiOF)