S-Space College of Engineering/Engineering Practice School (공과대학/대학원) Dept. of Electrical and Computer Engineering (전기·정보공학부) Theses (Ph.D. / Sc.D._전기·정보공학부)
A STUDY ON HIGH PERFORMANCE MILLIMETER-WAVE POWER AMPLIFIER INTEGRATED CIRCIUTS USING SERIES-CONNECTED FET STUCTURES
- 공과대학 전기·컴퓨터공학부
- Issue Date
- 서울대학교 대학원
- Millimeter-wave ; Stacked-FET ; Power amplifier ; FMCW Radar transceiver ; variable-gain low-noise amplifier
- 학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2012. 8. 권영우.
- The Series-connected FET structures are very useful method for various applications due to its output-voltage adding mechanism, each partial stacked-FET having the active load as followed CG-FET, and additional control bias from each CG-FET's gate bias.
Series power combining using stacked transistors for power amplifier application is a promising power combining method due to the its broadband output power performance, higher power-cell gain and easy integration with other power combining method such as parallel combining and DAT (distributed active transformer) combining as power cell -. Moreover, as the voltage combining method, stacked-FET architecture could be a better solution to transistors with low breakdown voltage. However, the implementation of series-combined amplifiers has been limited mostly to low frequencies due to the design difficulties and the voltage swing from each transistor to show different phases at high frequencies caused by the pronounced non-ignorable reactive effects of the transistors, resulting in out-of-phase voltage combining and optimum load mismatch of each transistor -. Different from the low frequency design method of stacked-FET structure, the optimum load impedances of stacked-FET are complex form. Moreover, the load impedance of preceding partial stacked structure is affected by subsequent CG-FET's load impedance due to its output capacitance at millimeter-wave frequency. Therefore, at millimeter-wave stacked-FET power amplifier, it is very difficult to make each FET's load impedance be close to a anticipated optimum point. Moreover, there are the natural limitations of stacked-FET power amplifier existent at millimeter wave. Besides the effect from voltage phase misalignment of each transistors, the output power can't help being lowered than simply estimated output power, since the load impedance levels at the intermediate drain node of each FET could not be a expected optimum point at millimeter-wave frequency
In this thesis, series power combining by developing design methodology suitable for millimeter-waves frequencies is demonstrated . In addition, for millimeter-wave operations, the limitations of series-connected FET structure have been analyzed: output power degradation with regard to operating frequency, increasing FET-stacking number, unit-FET's gate-periphery, and unit-FET's specific parameters : gate-to-source capacitance (Cgs), and transconductance (gm). To validate the power degradation of mm-wave stacked-FET PA, stacked-FET PA MMICs are designed and fabricated with various operating frequency (20 GHz, 40 GHz, and 60 GHz) and various FET device (mHEMT, pHEMT, and CMOS). Moreover, the novel solution against phenomenon of its output-power degradation at millimeter-waver stacked-FET power amplifier is also presented. The developed stacked-FET structure is applied to 77 GHz radar transceiver as power amplifier. The 77 GHz radar transceiver is fully integrated with 77 GHz frequency tripler, 77 GHz receiver with low-noise amplifier and direct conversion mixer, and 77 GHz cascode-FET power amplifier which shows output power of 17 dBm suitable for FMCW car-collision avoidance radar.
Beside the power amplifier application of series-connected FET structure, it is also used for application of millimeter-wave variable-gain low-noise amplifier. Different from the conventional cascode-FET variable-gain amplifier, the novel method for minimizing transfer-phase variation at overall gain dynamic range is developed.