A Study on Envelope Tracking CMOS RF Power Amplifier for Mobile Applications

Abstract

In this dissertation, three advanced techniques to solve system issues in CMOS envelope tracking power amplifier (ET PA) is presented. First of all, a dynamic FET stack control technique is developed to enhance the efficiency of the envelope tracking power amplifier (ET PA) system for low-voltage operation. The power cell used in the two-stage PA is a quadruple stacked FET structure with dynamic stacking controller to reconfigure the power cell into the quasi-triple or quasi-double stacks according to the magnitude of the input envelope signal. Proposed power cell boosts the peak efficiency in the low VDD region by bypassing the stack entering the triode region and re-optimizing the load impedance so that all the FETs operate under the saturation and the optimum load conditions. A detailed analysis is presented to understand the gain and phase step discontinuities at the stack switching points, and the circuit techniques to equalize the gain and phase between the adjacent stack configurations are developed. The proposed two-stage stack-controlled PA is fabricated with 0.32-μm Silicon-on-insulator (SOI) CMOS process together with the envelope amplifier (EA). Full long term evolution (LTE) characterization is performed using LTE signals with a peak to average power ratio (PAPR) of 6.7 dB and signal bandwidths (BW) of 10- and 20-MHz. With 10-MHz signals, dynamic stacking provides 3.5% power added efficiency (PAE) improvement over the static stack at 25.7 dBm, resulting in 47.5% PAE with 26.6 dB gain. 20-MHz LTE test shows an overall PAE of 45.9% with evolved universal terrestrial radio access (E-UTRA) adjacent channel leakage ratio (ACLR) of –33 dBc with memory-less digital pre-distortion (DPD). Even with the lower efficiency of the EA compared with the state-of-the-art results, the measured overall system efficiency with 3.4 V maximum voltage is comparable with those reported using GaAs HBTs with 5 V supplies, which clearly demonstrates the advantages of the proposed dynamic stack control. Second, a linear CMOS envelope tracking power amplifier is developed for wideband long term evolution-advanced (LTE-A) applications without using DPD. AM-AM distortion of the ET PA is flattened by the iso-gain envelope shaping while AM-PM distortion is compensated by the integrated phase linearizer. A single ET calibration step is required to generate the iso-gain shaping function, whose output is used to internally generate the control signal to the phase linearizer. Bandwidth limitation of the proposed approach is carefully investigated through the envelope simulation, which shows that the proposed approach can support wider bandwidth signal if the gain bandwidth product (GBW) of the operational trans-conductance amplifier (OTA) in the phase linearizer is large enough. The two-stage RF PA with the proposed phase linearizer is fabricated in 0.28-μm SOI CMOS process, and tested together with 0.32-μm SOI CMOS EA to demonstrate full ET PA system. When tested with a 40-MHz BW, intra-band contiguous carrier aggregation (CA) LTE-A signals, the overall system PAE of the ET PA system is 37% at 24 dBm output power. CA evolved universal terrestrial radio access adjacent channel leakage ratios (CA E-UTRAACLRs) is improved from –25.7 to –33 dBc by the phase linearizer. 40-MHz AM-AM and AM-PM dynamic characteristics of the ET PA are also measured to verify the effectiveness of the proposed linearizer. The overall efficiency of this work using CMOS FETs is comparable to or better than the most of the reported ET LTE PAs using GaAs and SiGe HBTs. Finally, a wideband EA with diode rectifier current injector is developed to overcome the problems of the conventional hybrid type EAs for 80-MHz BW LTE applications. The proposed EA is composed of a bias modulator and diode rectifier current injection circuit. The operation principle and efficiency of the proposed EA is investigated based on the equation based analysis. The proposed EA takes two input signals which are iso-gain shaped envelope signal and CW RF signal which has same carrier frequency to the RF PAs input RF signal. The proposed EA and 2-stage RF PA with a phase linearizer are fabricated in same 0.28-μm SOI CMOS process and overall ET PA is tested using wideband LTE signals up to 80-MHz. When tested using 80-MHz BW LTE signal, the overall system PAE reaches 41.2% at 25.2 dBm output power with –33.5 dBc E-UTRAACLR. A wideband performance is characterized using various bandwidth LTE signals which shows only 2.5 dB ACLR degradation without PAE degradation as the signal bandwidth is increased from 20- to 80-MHz. The measured Rx band noise using 5-MHz BW LTE signal at 50 MHz frequency offset is –126.1 dBm/Hz, which meets the system requirements. This is a first demonstration of the CMOS ET PA that covers 80-MHz BW LTE signals.