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Hybrid Gate Insulators Fabricated by Solution Process for High Performance of Organic Thin Film Transistors
고성능 유기 전자소자를 위한 용액 공정 기반의 하이브리드 게이트 절연막에 관한 연구

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Authors
김주희
Advisor
김연상
Major
융합과학기술대학원 나노융합학과
Issue Date
2016-08
Publisher
서울대학교 융합과학기술대학원
Keywords
organic thin film transistorsgate insulatorhigh k materialshybrid materialssol-gel processhysteresis
Description
학위논문 (박사)-- 서울대학교 융합과학기술대학원 : 나노융합학과, 2016. 8. 김연상.
Abstract
Organic thin film transistors (OTFTs) have attracted attention for next generation device, which shows transparent and flexible property. The main elements of OTFTs are semiconductor, gate insulator, and electrodes. To obtain the feature of flexible and transparent for OTFTs, the elements of them have to be composed of organic based materials or amorphous materials. Up to date, OTFTs used organic materials mainly show a research tendency which was focused on high performance of organic semiconductor. Organic semiconductors need generally high operating voltage because those indicate intrinsically low field-effect mobility due to their driving system caused by hoping of electrons through - intermolecular interactions between adjacent molecules. In this reason, in order to improve the performance of OTFTs, the gate insulators indicating high k property and low off current be required and have to be studied alongside organic semiconductors.
In this study, we focused the researches of gate insulators for inducing the conducting channel of semiconductor. Many researchers have tried to improve gate insulators for OTFTs by using organic materials, such as various polymers. Nevertheless, the organic based gate insulators have still several challenges, which are high leakage current and low dielectric constant (k). Whereas, metal oxides as high k materials, such as TiO2, Ta2O5, and HfO2, exhibits high leakage current due to polycrystalline formation tendency and narrow band gap as insulator. Here are the suggestions of polymer-metal oxide composite and metalorganic compound as gate insulators. They show flexible and transparent properties of polymer as well as increased dielectric constant due to high k materials.
First, we have introduced the TiO2-PVP composite (TPC) gate insulator to overcome the problems discussed above. The TPC is composed of a TiO2 precursor (titanium (IV) butoxide and acetyl acetone) and poly (4-vinylphenol) (PVP) solution (PVP, poly (melamine-co-formaldehyde) methylated/butylated and propylene glycol methyl ether acetate (PGMEA) solvent). As this TPC gate insulator can easily be deposited by a simple solution process and exhibits a considerably low surface energy, it generates a smooth and hydrophobic surface that allows the uniform vertically oriented growth of small semiconductor molecules and closely packed grains between crystal domains. Also, the TiO2 precursor induces an increased dielectric constant compared with the dielectric constant of pristine PVP. As this enhanced dielectric property leads to the increased drain current at a low operating gate bias voltage, the OTFTs including the TPC gate insulator could be successfully operated at gate bias voltage of VG = -3 V. Furthermore, this homogeneous TiO2-PVP composite solution is stable in ambient conditions, and it was easily applied in the fabrication of OTFTs. As a result, the OTFTs with a TPC gate insulator exhibited the better transistor performance with an increased on/off ratio, improved mobility, and low subthreshold voltage at a low operating gate bias voltage compared to the performance of OTFTs that include a pristine PVP gate insulator.
Second, we suggest the flexible inorganic-organic hybrid gate insulator materials fabricated by sol-gel process, which can lead into not only the improved field-effect mobility but also the operation at low gate bias voltage in the pentacene based-OTFTs. This gate insulator was composed with two layers
one is the charge-accumulation inducing layer made with Tetraethyl orthosilicate (TEOS), (3-Glycidoxypropyl) trimethoxysilane (GLYMO), and titanium acetylacetone precursor, the other is the electron-trap blocking layer made with aqueous potassium hydroxide and SiOX solution. These double-coated gate insulators successfully showed the capability of the solution process at the low temperature annealing as maximum as 175 ºC and the operation of the pentacene based-OTFTs at the low gate bias voltage (VG = ±5 V). The electron-trap blocking layer efficiently obstructs the space-charge electret induced by the electrons which was injected from a gate electrode during the operation of pentacene based-OTFTs. Thus, the hysteresis originated from -OH groups could be successfully decreased.
As a result, they indicated the improved dielectric constant with ~ 5.2 and induced the advanced field-effect mobility with 2.59 cm2/Vs at VG = -20 V and 1.08 cm2/Vs at VG = ±5 V in the pentacene based-OTFTs. Furthermore, to observe flexibility of the double-coated gate insulator, we conducted the bending test of its thin film and pentacene based-OTFTs up to enduring maximum curvature of bending distance 5 mm.
Language
English
URI
http://hdl.handle.net/10371/122391
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Graduate School of Convergence Science and Technology (융합과학기술대학원)Dept. of Transdisciplinary Studies(융합과학부)Theses (Ph.D. / Sc.D._융합과학부)
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