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Capacitance–Voltage Characterization of Tunnel Field Effect Transistors with a Si/SiGe Heterojunction
Si/SiGe 헤테로 접합을 가지는 터널링 전계효과 트랜지스터의 전기 용량 특성

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Authors
박태형
Advisor
박병국
Major
공과대학 전기·정보공학부
Issue Date
2017-08
Publisher
서울대학교 대학원
Keywords
Tunnel Field Effect TransistorThreshold VoltageApparent Carrier ConcentrationCapacitanceSi Capping LayerCentroid.
Description
학위논문 (석사)-- 서울대학교 대학원 공과대학 전기·정보공학부, 2017. 8. 박병국.
Abstract
A Si capping layer on a SiGe channel is essential to improve the interface properties between the SiGe channel and the gate insulator. Thus, devices with a Si capping layer should be analyzed to understand their electrical characteristics. In this thesis, a strained Si/SiGe heterojunction TFET is investigated via capacitance–voltage measurements, which are rapid and non-destructive. The C–V analysis method in a strained Si/SiGe heterojunction TFET is improved through TCAD simulations. Through a C–V analysis, important parameters pertaining to devices, such as the layer thicknesses and threshold voltages, can be extracted.
Language
English
URI
https://hdl.handle.net/10371/137406
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College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Electrical and Computer Engineering (전기·정보공학부)Theses (Master's Degree_전기·정보공학부)
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