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A High-Speed Link Transmitter for Emulating Channel Attenuation with Logarithmic and Exponential Function : 대수함수와 지수함수를 통한 전송신로 손실을 모사한 고속신호 전송회로
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- Authors
- Advisor
- 김재하
- Major
- 공과대학 전기·컴퓨터공학부
- Issue Date
- 2018-08
- Publisher
- 서울대학교 대학원
- Description
- 학위논문 (박사)-- 서울대학교 대학원 : 공과대학 전기·컴퓨터공학부, 2018. 8. 김재하.
- Abstract
- This paper describes a transmitter that can emulate a wide variety of frequency-dependent loss characteristics of high-speed DRAM channels, with an aim to facilitate an automated test procedure for DRAM interface that does not require physical reconfiguration of channels. Specifically, the proposed transmitter can generate the waveform of an NRZ data stream that experienced the adjustable amounts of skin-effect loss and dielectric loss of electrical channels. To save the hardware cost of implementing a high-speed, high-resolution digital-to-analog converter, the transmitter constructs the waveform using a set of logarithmic and exponential basis functions, each of which is implemented using a pseudo-logarithmic amplifier and low-bandwidth amplifier with adjustable gain and bandwidth, respectively. The prototype chip fabricated in 65um CMOS consumes 52,000um2 and operates over 1.4~7Gbps while dissipating 38mW at 7Gbps. It is demonstrated that the implemented transmitter can emulate 10~40-long microstrip lines on FR4 material with the peak error less than 6.25% in the pulse response.
- Language
- English
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